iSTART-TEK announced that its memory testing solutions now fully support the IEEE 1838 standard interface, helping customers accelerate the testing and verification of 3D ICs.
While 3D ICs deliver higher performance and density, they also significantly increase the challenges and quality requirements of memory testing. To address these challenges, the IEEE 1838 standard establishes a comprehensive test mechanism—and iSTART-TEK has taken the lead in deploying this interface in practical memory testing.
iSTART-TEK’s solution enables each die to independently generate an MBIST (Memory Built-In Self-Test) circuit, which is then connected through standardized interfaces to shared I/O ports within a unified test architecture, allowing all dies to be tested.
This interface allows parallel memory testing of multiple dies simultaneously or independent testing of each die’s memory. Not only does this significantly reduce design complexity, but it also enhances flexibility for customer verification. More importantly, the architecture effectively increases test coverage, ensuring high standards of functionality and reliability for the chips.
iSTART-TEK emphasized that as 3D IC adoption grows rapidly, reliable testing solutions are critical to maintaining competitiveness. With IEEE 1838 support, its products not only simplify testing challenges in both design and production stages of 3D chips but also reduce testing risks, while delivering higher-quality chips for high-performance computing, AI, and automotive applications.