Algorithms

UDA is a patented GUI-based platform for designing flexible memory testing algorithms based on chip features.

Features

  • UDA can not only reduce time costs but also generate the customized algorithms expeditiously according to the memory defect types
  • UDA offers users more flexible and various memory testing algorithms and testing glows
  • Any complicated memory testing algorithms can be easily generated
  • UDA can be used with START™ v3 and EZ-BIST

Applications

  • Allow users to change testing algorithms after CP stages

Interface

  • SRAM Interface
  • JTAG
  • IEEE1500
  • IEEE1149.1
  • IEEE1687
  • Basic

EZ-TEC can coexist with the existing memory testing circuits of chip design companies. This U. S. patent breaks down memory testing algorithms into elements, allowing users to reconstruct the architecture of any memory testing algorithm through element reorganization.

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